Xilinx today launched the Virtex UltraScale+ VU19P. This 16nm tool with 35 billion transistors, consisting of four chips on an interposer, is the world’s most massive field-programmable gate array (FPGA) and comprises 9 million logic cells.
Aside from the 9 million logic cells, the Virtex VU19P further features 1.5Tb/s of DDR4 memory bandwidth, as much as 4.5Tb/s of transceiver bandwidth and over 2,000 users I/Os. Xilinx says the FPGA is 1.6x more significant than the 20nm Virtex UltraScale 440, its ancestor and to date previously the business’s largest FPGA. That one has 5.5 million logic cells.
Xilinx is concentrating on ASIC or SoC producers that use FPGAs for emulation, prototyping, and validation. That allows developers to start software integration before the silicon is available. Different applications embrace test, measurement, networking, compute aerospace, and defense. Xilinx further provides accompanying device flows and IP to assist it.
While no recent disclosures can be found, an old remark from Altera had Stratix 10 also at 35 billion transistors; however, that features the transceivers which are linked through EMIB to the base die. Intel recently introduced another large chip on 16nm, the Nervana Spring Crest NNP-T with 28 billion transistors. Though at 688mm2, it’s not as big (in die measurement) as the 21 billion transistors Nvidia V100 that is over 800mm2.
It will be some time until the VU19P is offered, as its global launch is planned for the autumn of 2020. Xilinx recently released a brand new, small form factor Alveo U50 card for data center acceleration based on its UltraScale+ structure and began delivering its 7nm Versal ACAP to early prospects.